when slave address is placed in DR register then ADDR bit set but when control return from the address phase function the bit is cleared automatically .
PS: this happens only in debug mode
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when slave address is placed in DR register then ADDR bit set but when control return from the address phase function the bit is cleared automatically .
PS: this happens only in debug mode
The reason for this automatic clearing of the ADDR flag without explicitly reading SR2 could be attributed to the nature of the I2C protocol and its hardware implementation. When the I2C peripheral detects that the slave address matches and the ADDR flag is set, it knows that the address phase has been successfully completed. At this point, the I2C peripheral might automatically clear the ADDR flag as it transitions to the next phase of communication, which could involve reading or writing data.
In many microcontroller or peripheral implementations of the I2C protocol, this automatic clearing of the ADDR flag can help simplify software handling
Thank you for the clarification. But if it resets automatically before I can check if the addresses matched or not then how would I continue the task?
I must know if the address matched or not.
Configure an interrupt to trigger when the “ADDR” flag is set. This way, when the address is matched during the address phase, an interrupt will be generated, allowing you to handle the address match in the interrupt service routine (ISR). This approach can provide you with more control over the address-matching process.